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Oh OK I see. Ill try that setup the nigh engender I get a chance. Heres the complete program: leaning R=DEC INCLUDE p16f684.inc __CONFIG _FCMEN_OFF & adenosine monophosphate; _IESO_OFF &type A; _BOD_OFF & _CPD_OFF & _MCLRE_OFF & _PWRTE_ON & _WDT_OFF & _INTOSCIO ; Variables CBLOCK 0x20 Dlay, i, INNER, outer(prenominal), OUTER2 ENDC PAGE ; Main notational system org 0 nop ; For ICD Debug CLRF INNER CLRF OUTER ;*******Start of stimulation prerequisite for PIC******* STATUS equ 03h ; address of the STATUS launch TRISA equ 85h ;Address of the tristate register for port A initiative equ 05h ;Address of Port A ;****Set up the port**** movlw b111 movwf CMCON0 bsf STATUS,5 ; sack to wedge 1 movlw 01h ;Set the Port A pins: movwf TRISA ; berth 1to startput, bit 0 to input. bcf STATUS,5 ;Switch back to brink 0 Delayloop4: Delayloop5: decfsz INNER, 1 goto Delayloop5 decfsz OUTER, 1 goto Delayloop4 Start: btfss PORTA, 0 ;skip next line if bit 0 is set in PORTA goto Start ;*******end of input requirement******* movlw 0 movwf OUTER movwf OUTER2 movlw 1 << 2 ; Start with molybdenum 2 agile movwf PORTC movlw 7 ; contort off Comparators movwf CMCON0 bsf STATUS, RP0 ; Execute out of vernacular 1 clrf ANSEL ^ 0x080 ; all Bits are Digital movlw 1 << 2 ; Start with Bit 2 Active movwf PORTC movlw 7 ; Turn off Comparators movwf CMCON0 bsf STATUS, RP0 ; Execute out of lingo 1 clrf ANSEL ^ 0x080 ; All Bits are Digital movlw b000011 ; RC5:RC2 are Outputs movwf TRISC ^ 0x080 bcf STATUS, RP0 ; Return murder to Bank 0 clrf i movlw 100 ;Number of steps in cw boot movwf INNER ccwLoop: rallying cry ccwstep decfsz INNER, 1 goto ccwLoop Delayloop3: ;This share delays the transition between the two directions by 50 seconds. Delayloop: Delayloop2: decfsz INNER, 1 goto Delayloop2 decfsz OUTER, 1 goto Delayloop decfsz OUTER2,1 goto Delayloop3 movlw 100 ;Number of steps in cw direction ! movwf INNER cwLoop: call cwstep decfsz INNER, 1 goto cwLoop...If you hope to get a full essay, order it on our website: OrderCustomPaper.com

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